Simplify Next Gen Serial Link Measurements - Webinar

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說明

For 4th generation serial standards such as PCIe Gen4 and SAS4, accurate measurements during the characterization phase are essential to understanding device performance and having confidence during system integration and interoperability. The high speed nature of 4th generation serial standards combined with tight integration at a system level imposes several barriers during testing:Usage of test fixtures to access signals at outputs of the transmitters during device testing, leading to inclusion of the effects of test fixtures and measurement circuits in the measured results.Lossy nature of the channels used leads to degraded signal with no eye opening at the input of the receiver, making it impossible to make any measurements.Time, effort, and expense involved in building different system topologies to study different channel material and layouts.Applying the receiver models based on silicon implementation to study the different receiver setups and their effects on BER leading to better correlation of measured and simulated results. In this webinar, we will review the above in greater detail and share advanced techniques to help overcome these issues and simplify characterization and debug of 4th generation serial standards.

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